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Topic Details for Soft Logic

Help - Soft Logic Specs

Overview:

The following are the specifications for the "Ck" soft logic library.

General Specifications:

Characteristic	Limits
Data table size	50 kbytes
Digital inputs	2000
Digital outputs	2000
Analogue inputs	125^{1, 2}
Analogue outputs	125^{1, 2}
Timers	500
Counters	250
Maximum number of instructions	No limit³
Maximum number of subroutines	No limit³

¹Plus an equal number of signed addresses.

²In addition to these addresses, any register type can be used for I/O, not just the "analogue" addresses.

³There is no enforced limit to the size of program that can be run. The practical limitations are related to the resulting scan rate and the time to load the program on start up.

Instruction Speed:

The actual instruction speed achieved in any application will depend on the speed of the computer used. The following are some representative times from a relativesly slow (1.8GHz Sempron) PC.

All times are in micro-seconds per instruction.

Boolean Inputs / Edge Contacts / Compare

Instruction	Speed
STR / STRN	0.63
AND / ANDN	0.13
OR / ORN	0.13
ANDSTR / ORSTR	0.68
ANDND / ORND	0.86
ANDPD / ORPD	0.75
STRND / STRPD	1.33
ANDE / ANDNE (reg / reg)	0.13
ANDE / ANDNE (3 char string / reg)	0.21

Boolean Outputs

Instruction	Single bit	2 bits	16 bits	128 bits
OUT	0.20	3.57	7.04	34.22
PD	0.88	4.38	7.95	35.55
RST / SET (rung true)	0.33	3.31	6.78	34.05
RST / SET (rung false)	0.11	0.11	0.11	0.11

Counter / Timer / Math

Instruction	Speed
CNTU	2.53
TMR	10.32
TMRA	9.38
MATHDEC (x + y * z / a MOD b)	5.45
MATHDEC (SIN 0.5)	5.01
MATHHEX (LSH(reg, h2))	5.16

Shift Register

Instruction	16 bits	128 bits
SHFRG	9.13	40.94

Pack / Unpack

Instruction	1 bit	16 bits
PACK	5.54	11.82
UNPACK	10.21	15.58

Single Register Copy

The single register copy operation is a multi-purpose instruction that also performs pointer (indirect addressing) and type conversion (e.g. integer to string) operations.

Instruction	Speed
COPY (constant to register without one shot) ¹	0.75
COPY (constant to register with one shot) ¹	1.5
COPY (register to register of the same type without one shot) ²	0.94
COPY (register to register of the same type with one shot) ²	1.7
COPY (register to register of different type)³	9.9
COPY (integer to TXT conversion, 4 digits) ⁴	25
COPY (string constant to TXT registers)⁵	24 (+ 0.4 per char)
COPY (constant to pointer)	16
COPY (register to pointer)	8.6
COPY (pointer to register)	17
COPY (pointer to pointer)	21
COPY (rung false - no operation)	0.11

¹Copying a single character constant (e.g. "A") is also a constant to register copy operation.

²Registers are considered to be of the "same" type for copy operations when a value in the source register can always be guaranteed to fit within the destination register and are of the same basic type. For example, "DS" to "DD" will always fit, but "DD" to "DS" may not fit. "DD" and "DF" are of different basic types (integer versus floating point) and so are different for copy purposes.

³The source type must be capable of being converted to the destination type.

⁴This involves an integer to string conversion plus a string copy.

⁵E.g. copying "ABCDE" to TXT10 - TXT14 will take 24 + (0.4 * 5) = 26.

Multi-Register Operations

Instruction	2 regs	100 regs	1000 regs
CPYBLK	14.2	360.32	3669.33
FILL	7.97	31.74	246.88
FINDEQ	8.23	167.66	1821.93
SUM	7.88	36.05	331.68

Miscellaneous

Instruction	Speed
NETWORK (start new rung)	0.51
FOR / NEXT (per empty loop iteration)	0.08
CALL / RT (call plus return from empty subr)	3.93

Instruction Set:

The instruction set implemented in the "Ck" logic engine is very similar to that of the Koyo "Click". The "Ck" logic engine is not however intended to be an emulator or direct replacement for the "Click". It is intended to be a useful soft logic library that is similar enough to the "Click" that someone already familiar with one will find the other easy to learn and understand.

Instructions

The instructions are documented in detail elsewhere. The following is just a brief summary.

Instruction type	# of Instructions
Boolean input	8
Edge contact	6
Boolean output	8
Comparison	18
Program control	8
Counter and timer	6
Copy	5
Search	12
Shift register	1
Math operators and functions	26

Instructions Not Implemented, or Implemented Differently

Certain instructions present in the Koyo "Click" were either not implemented in the "Ck" logic engine, or were implemented differently.

The communications functions were not implemented. The "Ck" logic engine is part of a complete stand alone soft logic system. Communications features are provided by the rest of the supporting software.
The SUM math function was implemented as a separate stand alone instruction rather than being integrated into the MATHDEC and MATHHEX instructions.
Floating point math calculations are performed as double precision rather than single precision operations. This may result in more accurate, but slightly different results.
The DRUM instructions are not implemented at this time. (They may be added in a future version).
The watch dog timer is not implemented at this time. (This is intended to be in a future revision).
The digital I/O system is addressed differently. The digital I/O (X, Y) is arranged as a continuous address space. The I/O registers (XD, YD) are separate address spaces from the digital I/O, and may be used for analogue and other word I/O. To address digital I/O as words, use the PACK and UNPACK instructions.
Signed analogue I/O addresses (XS and YS) have been added. These are more generally useful than the unsigned (XD, YD) equivalents.
There are no immediate I/O or interrupts, as these are PLC CPU on board I/O hardware features which are not present in a soft logic system.
There is no fixed scan mode.
Hardware related system control relay (SC) and system register (SD) addresses which relate only to "Click" hardware features are not implemented.